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Paulo Baltarejo Sousa (Publications)

Paulo Baltarejo Sousa (Publications)

Paulo Baltarejo Sousa (Publications)

PhD University of Porto, Portugal
Professor, Collaborator PhD Researcher

Paulo Baltarejo Sousa received a degree in computer engineering from the School of Engineering, Polytechnic Institute of Porto, in 2003. In 2007, he received a MSc in Electrical and Computer Engineering from Technical Institute, Technical University of Lisbon. In 2013, he received a PhD in Informatics Engineering from Faculty of Engineering, University of Porto.
Since 2003 he is teaching assistant at the Department of Computer Engineering of the School of Engineering of the Polytechnic Institute of Porto and also research at CISTER.
Now, his current research interests are in the field of real-time scheduling algorithms for multiprocessor systems with special focus on implementations in operating systems.

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Thesis
Real-Time Scheduling on Multi-core: Theory and Practice CISTER-TR-131202 
Paulo Baltarejo SousaPhD Thesis. 29, Oct, 2013. Porto, Portugal.
Performance Analysis of Wireless-enabled PROFIBUS Networks HURRAY-TR-070607 
Paulo Baltarejo SousaMaster Thesis. 6, Jun, 2007. Lisbon, Portugal.
Journal Papers
Unified Overhead-aware Schedulability Analysis for Slot-based Task-splitting CISTER-TR-130201 
Paulo Baltarejo Sousa, Konstantinos Bletsas, Eduardo Tovar, Pedro Souto, Benny ÅkessonReal-Time Systems journal, Springer US. Jul 2014, Volume 50, Issue 4, pp 1-56.
Enhancing the Real-time Capabilities of the Linux Kernel HURRAY-TR-120701 
Paulo Baltarejo Sousa, Nuno Pereira, Eduardo TovarACM SIGBED Review - Special Issue on the 24th Euromicro Conference on Real-Time Systems (ACM SIGBED Rev), ACM. Nov 2012.
Hybrid Wired/Wireless PROFIBUS Architectures: Performance Study Based on Simulation Models HURRAY-TR-101006 
Paulo Baltarejo Sousa, Luis Lino Ferreira1, Dec, 2010.EURASIP Journal on Wireless Communications and Networking, vol. 2010, Article ID 845792, 25 pages, 2010. doi:10.1155/2010/845792
Conference or Workshop Papers/Talks
Overhead-aware schedulability evaluation of semi-partitioned real-time schedulers CISTER-TR-150402 
Pedro Souto, Paulo Baltarejo Sousa, Robert Davis, Konstantinos Bletsas, Eduardo TovarIEEE 21st International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2015). 19 to 21, Aug, 2015. Hong Kong, China.
The Carousel-EDF Scheduling Algorithm for Multiprocessor Systems CISTER-TR-130401 
Paulo Baltarejo Sousa, Pedro Souto, Eduardo Tovar, Konstantinos Bletsas19th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2013), IEEE. 19 to 21, Aug, 2013, pp 12-21. Taipei, Taiwan.
On the implementation of real-time slot-based task-splitting scheduling algorithms for multiprocessor systems HURRAY-TR-110903 
Paulo Baltarejo Sousa, Konstantinos Bletsas, Eduardo Tovar, Björn Andersson13th Real-Time Linux Workshop. 20 to 22, Oct, 2011, pp 207-218. Prague, Czech Republic.
Practical Aspects of Slot-Based Task-Splitting Dispatching in its Schedulability Analysis HURRAY-TR-110404 
Paulo Baltarejo Sousa, Konstantinos Bletsas, Björn Andersson, Eduardo Tovar17th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2011), IEEE. 28 to 31, Aug, 2011, 1, pp 224-230. Toyama, Japan.
Implementing Slot-Based Task-Splitting Multiprocessor Scheduling HURRAY-TR-110704 
Paulo Baltarejo Sousa, Björn Andersson, Eduardo Tovar6th IEEE International Symposium on Industrial Embedded Systems (SIES 11), IEEE. 15 to 17, Jun, 2011, pp 256-265. Vasteras, Sweden.
Challenges and Design Principles for Implementing Slot-Based Task-Splitting Multiprocessor Scheduling HURRAY-TR-100911 
Paulo Baltarejo Sousa, Björn Andersson, Eduardo Tovar31st IEEE Real-Time Systems Symposium (RTSS 2010). 30, Nov to 3, Dec, 2010, Work-In-Progress Session. San Diego, U.S.A..
Repeater vs. Bridge-Based Hybrid Wired/Wireless PROFIBUS Networks: a Comparative Performance Analysis HURRAY-TR-060901 
Paulo Baltarejo Sousa, Luis Lino Ferreira, Mário Alves11th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA’06), IEEE. 20 to 22, Sep, 2006, pp 1065-1072. Prague, Czech Republic.
Conference or Workshop Posters/Demos
Enhancing the Real-time Capabilities of the Linux Kernel in Multicore Platforms CISTER-TR-130609 
Paulo Baltarejo Sousa, Konstantinos Bletsas, Eduardo Tovar, Pedro Souto, Nuno PereiraPoster presented in CISTER 1st Industrial Workshop on Real-Time and Embedded Systems (CiWork 2013). 18, Jun, 2013. Portugal.
Enhancing the Real-time Capabilities of the Linux Kernel in Multicore Platforms CISTER-TR-140602 
Konstantinos Bletsas, Eduardo Tovar, Pedro Souto, Nuno Pereira, Paulo Baltarejo SousaPoster presented in CISTER 1st Industrial Workshop on Real-Time and Embedded Systems (CiWork 2013). 18, Jun, 2013. Porto, Portugal.
Technical Reports
Implementing Slot-Based Task-Splitting Multiprocessor Scheduling HURRAY-TR-100504 
Paulo Baltarejo Sousa, Björn Andersson, Eduardo Tovar16, May, 2010.
Sporadic Multiprocessor Linux Scheduler HURRAY-TR-090102 
Paulo Baltarejo Sousa15, Jan, 2009.
Bridge Architecture to Interconnect Hybrid Wired/Wireless PROFIBUS Networks HURRAY-TR-080102 
Paulo Baltarejo Sousa, Luis Lino Ferreira5, Jan, 2008.
Bit Error Models HURRAY-TR-070602 
Paulo Baltarejo Sousa, Luis Lino Ferreira26, Jun, 2007.
Probability Distribution Functions HURRAY-TR-070603 
Paulo Baltarejo Sousa, Luis Lino Ferreira26, Jun, 2007.
Tools for Simulation Output Analysis HURRAY-TR-070604 
Paulo Baltarejo Sousa, Luis Lino Ferreira26, Jun, 2007.
Repeater-based Hybrid Wired/Wireless PROFIBUS Network Simulator HURRAY-TR-060402 
Luis Lino Ferreira, Paulo Baltarejo Sousa1, Apr, 2006.
Wireless Mobility Simulator HURRAY-TR-060403 
Luis Lino Ferreira, Paulo Baltarejo Sousa1, Apr, 2006.
Bridge-based Hybrid Wired/Wireless PROFIBUS Network Simulator HURRAY-TR-050403 
Paulo Baltarejo Sousa, Luis Lino Ferreira1, Apr, 2005.